Tom's Physics 123 Page

Nov. 23, 2009

Nov. 4, 2009

8051 References

8051Instruction Set Reference (Phillips) (this is xeroxed "Reference B")
8051 tutorial,from Web (this is xeroxed "Reference A")

Dallas data sheet for DS89C420/30 processor
Dallas high speed microcontroller User's Guide
Index to selected topics in Dallas User's guide

Raison 8051 assembler and simulator

Here is the excellent free program (free for code size under4K) that I use to assemble and simulate code. kit51_747_.exe: zipped Raisonance assembler, compiler & simulator. (18.5M, expands to 50M)
And here--long before you'll need it--is a file of vector names--an".INC" file that zealots will want to include in the INC directory oftheir Raisonance/Ride installation! (I realize I may be speaking to no one atall.) Here it is: a table of symbolic names for the80C320's vector addresses (for use with a program that relies oninterrupts). These vector addresses are the same for the DS89C420 and DS89C430, incidentally.

Link to RIDE documentation: detailed user's guide

I expect this is much more than you want; but here it is, anyway, for thezealot who wants the full story about the Raisonance assembler, compiler &simulator.
Part I
Part II

It's a zipped file (about 37M),and includes instructions.
When we ask you to do some coding, Ride will help a lot, though it is notessential (you can use the programmer's reference, in the posted set ofsources, to see the instruction set. You may not need even that: some preferjust steal code from the lab programs!). The file: ShortNote on how to use the RIDE Assembler & Simulator
Sampleprograms (some of those used in the micro labs)

Nov. 3, 2009

Class 18: Digital-5 -- Analog-digital; PLL (Tues., Nov. 3, 2009; TCH)
Lab 19/mu1: Add processor
Lab 19/mu1 PAL description

Homework d3: ADC; little project (due Monday, Nov. 9, 2009)

Alternate Template files for Verilog exercise, simplest counter

two_bit_nov09.zip For HW D2: this is a source and testbench, in case you (like several) found the earlier files failing under ISE.

Oct. 31, 2009

Class 17: Digital-4 -- Memory; state machines (Fri. Oct. 30, 2009; TCH)
Class 17: Digital-4 -- Memory; state machines (Thurs., Oct. 29, 2009; TCH)

Oct. 28, 2009

Class 16: Digital-3 -- Counters (Wed, Oct. 28, 2009; PH)

Class 16: Digital-3 -- Counters (Tues, Oct. 27, 2009; PH)

Oct. 27, 2009

Homework d2: Counters, Verilog (due Monday, Nov. 2, 2009)

Template files for Verilog exercise

two_bit_simplest_ctr_ise.zip Full project file (.ISE), for simplest 2-bit counter; zipped. You can unzip this and then open the .ise file as a part of HW D2.
2-bit simplest counter source file (two_bit_simplest_ctr.v) If you prefer to put together the pieces of your project, then open a new project and use "add source" to add this design file and the testbench file ("..._tb.v"), just below.
2-bit simplest counter testbench file (two_bit_simplest_ctr_tb.v)
2-bit up/down counter testbenchfile (two_bit_up_dn_ctr_tb.v) This is a testbench for the up/down counter that we'd like you to write. Include it in your up/down project. The filename remains as in the original file--two_bit_simplest_ctr.v. Don't change that filename, as you modify the counter file so as to make it count up/down.

Lab 16/D3: Counters (Rev 1)
Lab 17/D4: Memory
Class D2: flops (Fri., Oct 23; TCH)
Class D2: flops (Thurs., Oct 22; TCH)

Oct 22, 2009

glue_mt.abl ABEL template file: you are to insert equations into this file, for HW D1.
Note on address decoding Just a couple of pages; may help with the 'write protect' question of HW D1.

Two Logic Compilers

ABEL and Verilog download, free from a PLD manufacturer, Xilinx. The download is very large. You'll find the program here: Xilinx ABEL download (restricted to Xilinx parts); Click on ISE WebPACK, register, and download version 10.1--not the current version, which has dropped ABEL, the compiler we will use this weekend. You do not need the ModelSim simulator, and should choose the ISE simulator, not the Modelsim simulator listed in a screenshot on p. 4 of the handout titled ".Note on Using Xilinx version of ABEL."

Note on using ABEL with Xilinx download
Note on Xilinx ISE, more generally: Verilog and ABEL ABEL discussion begins only on p. 9; some overlap with the note just above.

Oct. 21, 2009

Class 14/D1: Gates (Wed., Oct 21; marked "13" on agenda page; PH)
Class 14/D1: Gates (Tues., Oct. 20; TCH)

Homework D1: combinational logic (due mon., Oct. 26, 2009)

Lab 15/D2: Flip-Flops
Lab 14/D1: Gates

Oct. 18, 2009

Here's a Class Note on Voltage Regulators that was xeroxed badly, omitting many pages (I'm told).
Class Note on Voltage Regulators (replacing the note in Manual)

Oct. 15, 2009: Miscellaneous Notes (Analog)

Here, we're trying to post all the miscellaneous notes that were handed out in paper form but not posted. (If we missed something, please send Tom a note.)
Reading Resistors
Voltage versus Current
Reading Capacitors
Toward intuition about capacitors
Fourier Puzzle
Transformer Current
Worked Example: problem: Splitter
Worked Example: problem: Splitter Solution
Transistor Summary
Worked example: op amp diff amp (analysis)
Op amp frequency compensation
Noise
Active Filters

Oct. 13, 2009

Class 12: MOSFET switches (Tues., Oct 13; TCH)

Lab 13: group audio project

Oct. 12, 2009

Class 11: Regulators & Heatsinking (Fri., Oct 9; PH)

Oct. 8, 2009

Class 11: Regulators & Heatsinking (Thurs., Oct 8; PH)

Oct. 7, 2009

Class 10: Op Amps V: PID motor control loop (Wed., Oct 7; TCH)
Class 10: Op Amps V: PID motor control loop (Tues., Oct 6; TCH)

Lab 11: voltage regulators

Oct. 5, 2009

Homework 5: review & regulators (due TUESDAY, Oct. 13, 2009)

Oct. 4, 2009

Lab 10 Op Amps V: PID motor control loop

Oct. 3, 2009

Class 9: Op Amps IV: nasty positive feedback (Fri., Oct 2; TCH)
Class 9: Op Amps IV: nasty positive feedback (Thurs., Oct 1; PH)

Class 8: Op Amps III: oscillators (Wed., Sept 30; PH)
Class 8: Op Amps III: oscillators (Tues., Sept 29; TCH)

Lab 9/10b Op Amps IV: nasty positive feedback

Homework 4: op amps (due Monday, Oct. 5, 2009)

Sept. 25, 2009

Class 7: Op Amps II (Fri., Sept 25; TCH)
Class 7: Op Amps II (Thurs., Sept 24; PH)
Lab 8/10a Op Amps III

Class 6: Op Amps I (Wed., Sept 23; PH)

Sept. 21, 2009

Class 6: Op Amps I (Tues., Sept 22; TCH)
Lab 7/9: Op Amps II

Homework 3: op amps (due Monday, Sept. 28, 2009)

A supplementary note: transistor summary (confusing footnote reference markers that looked like exponents have been replaced.)

Sept. 19, 2009

Class 5: Transistors II (Fri., Sept 18; TCH)
Class 5: Transistors II (Thurs., Sept 17; PH)

Sept. 16, 2009

Class 4: Transistors I (Wed., Sept 16; PH)

Sept. 15, 2009

Class 4: Transistors I(Tues., Sept 15; TCH)
Lab 5: Transistors II
Lab 6/8: Op Amps I

Homework 2: Transistors (bipolar) (due Monday, Sept. 21, 2009)

Sept. 11, 2009

Class 3: inductors and diode circuits (Fri., Sept 11; PH)

Class 3: diode circuits (Thu.., Sept 10; TCH)

Sept. 9, 2009

Class 2: RC circuits (Wed., Sept 9; PH)

Class 2: RC circuits (Tues., Sept 8; TCH)

Homework 1: passive circuits (due Monday, Sept. 14, 2009)
Lab 3: Diode Circuits
Lab 4: Transistors I

Sept. 4, 2009

Class 1: DC Circuits: Volts, Amps, Ohms, and all that... (Fri., Sept 4; TCH)

Class 1: DC Circuits: Volts, Amps, Ohms, and all that... (Thurs, Sept 3; PH)

Sept. 2, 2009

Class & Section List (first draft)
This is just a first pass. We know people will be appearing and disappearing, and shifting sections, in the coming week. If you didn't rule out Wed-Fri., we put you in that section, because Tue-Thu was heavily subscribed. But come when you can, regardless of the section assignment: if you must, come Tues-Thu. even if you're listed as Wed-Fri.

August 28, 2009

Course Information
Course Schedule
1st-day Signup Form
Lab 1: DC Circuits
Lab 2: RC Circuits

Link to Text problem solutions, and old exams (some with solutions)

Click here to hop to old Finals, and Text-problem solutions