Tom's Physics 123/223, ES-153 Page


Dec. 10, 2014

Review session notes (mostly handwritten): Dec. 10

Dec. 2, 2014

Class mu7 notes (handwritten): xmssn lines, project ideas, Dec. 2

Nov. 30, 2014

Class mu6 notes (handwritten): examlike exercise, Nov. 25

Nov. 20, 2014

Class mu5 notes (handwritten): serial, tables, Nov. 20

Nov. 19, 2014

Class mu4 notes (handwritten): interrupt, Nov. 18

Nov. 17, 2014

HW D6, due Monday, Nov. 24, 5 p.m.

Nov. 12, 2014

Class mu2 notes (handwritten): I/O, u., Nov. 11

Nov. 10, 2014

HW D5, due Monday, Nov. 17, 5 p.m.
Verilog template file, reaction_timer_april2011_MT.v, for HWD5 Note that you ought to remove the "MT" from the file when it is no longer empty, so as to make it fit the testbench. Probably this point is familiar to you, by nyw.
Verilog testbench file, reaction_timer_april2011_tb.v, for HWD5 Note that this testbench name does not include the "MT."

Nov. 7, 2014

Class mu1 notes (handwritten): processor, controller, Th., Nov. 6

Nov. 4, 2014

Class 18p notes (handwritten): project fragments, Tu., Nov. 4

Nov. 3, 2014

HW D4, due Monday, Nov. 10, 5 p.m.
Verilog template file, hw_adr_decode_MT.v, for HWD4
Verilog template file, two_bit_simplest_ctr.v, for HWD4
Verilog testbench file, three_bit_sync_clear_tb.v, for HWD4

Labs: Big Board
Lab micro1: Big Board (Dallas branch)
Lab micro2: Big Board (Dallas branch)
Lab micro 3: Big Board (Dallas branch)
Labs: SiLabs
Lab C1: startup (SiLabs branch)
Lab C2: byte in, out (SiLabs branch)
Lab C3: timers (SiLabs branch)

Here's a large block of reference materials, re 8051 in its two versions, and the RIDE assembler & simulator

We don't expect you to read through this great blob of stuff. It's here for occasional reference.

8051 References

8051Instruction Set Reference (Phillips) We will give you this in xeroxed form, as well.
8051 tutorial,from Web


Interrupt Vectors File (for both SiLabs and Dallas)

".inc" file listing addresses of interrupt vectors This file, vectors320.inc, is "included" in many of the templates and sample programs that we have posted. It tells the assembler where to place the interrupt response routines. It allows you to write "int0vector" and have the assembler look up what that address is (03h, it turns out).

Data sheets and info for the two versions of the 8051

Data sheet for SiLabs C8051F410 controller
Data sheet for Dallas DS89C420/30 controller, used in 'Big Board' version of labs
Dallas high speed microcontroller User's Guide
Index to selected topics in Dallas User's guide

Raison 8051 assembler and simulator

Here is the excellent free program (free for code size under4K) that I use to assemble and simulate code. kit51_747_.exe: zipped Raisonance assembler, compiler & simulator. (18.5M, expands to 50M)

References for Raisonance RIDE assembler/C-compiler/simulator

And here--long before you'll need it--is a file of vector names--an".INC" file that zealots will want to include in the INC directory oftheir Raisonance/Ride installation! (I realize I may be speaking to no one atall.) Here it is: a table of symbolic names for the80C320's vector addresses (for use with a program that relies oninterrupts). These vector addresses are the same for the DS89C420 and DS89C430, incidentally.

Link to RIDE documentation: detailed user's guide


I expect this is much more than you want; but here it is, anyway, for thezealot who wants the full story about the Raisonance assembler, compiler &simulator.
Part I
Part II

It's a zipped file (about 37M),and includes instructions.
When we ask you to do some coding, Ride will help a lot, though it is notessential (you can use the programmer's reference, in the posted set ofsources, to see the instruction set. You may not need even that: some preferjust steal code from the lab programs!). The file: ShortNote on how to use the RIDE Assembler & Simulator

Sample Programs

SiLabs Programs

Note that your "path" that tells the assembler/compiler where to find files, which is "$INCLUDE (C:\MICRO\8051\RAISON\INC\c8051f410.inc)", for example, in one of our .a51 source files, may differ on a particular computer which has stored it elsewhere. We've tried to place these files in the same paths on the lab machines, but may have failed on a particular machine.
Sampleprograms (some of those used in the SiLabs micro labs)

Dallas Programs

Sampleprograms (some of those used in the 'Big Board' Dallas micro labs)

Oct. 30, 2014

Class D5 notes (handwritten): adc, Th., Oct30
Oct. 29, 2014 Lab D5: ADC, DAC, PLL
Class D4 notes (handwritten): memory, Tu., Oct 28
HW D3, due Monday, Nov. 3, 5 p.m.
Verilog template file, stepglue_MT_nov12.v, for HWD2
Verilog testbench file, stepglue_MT_nov12_tb.v

A Logic Compiler

Verilog download, free from a PLD manufacturer, Xilinx. The download is very large. You'll find the program here: Xilinx Verilog download (restricted to Xilinx parts); download ISE, NOT VORNADO. Click on ISE (you'll get the free Weback), register, and download version 14, any sub-revision. You do not need the ModelSim simulator, and when you create a project should choose the ISE simulator, not the Modelsim simulator.
PLDs_and_logic_compilers
Note on Xilinx ISE, more generally: Verilog and ABEL

Oct. 24, 2014

Class D3 notes (handwritten): counters, Th., Oct 23

Oct. 22, 2014

Class D2 notes (handwritten): gates, Tu., Oct 21
Midterm makeup offer To be held Mon., Oct. 27, 4 p.m. in lab We hope you won't take this unless you're keenly disappointed in the results of the midterm. For odd terms of the offer see link.

Oct. 20, 2014

HW D2, due Mon., Oct. 27, 5 p.m.

Oct. 17, 2014

Class D1 notes (handwritten): gates, Th., Oct 14

Oct. 15, 2014

HW D1, due Mon., Oct. 20, 5 p.m. This is an undersized HW, since you don't have a full week for it, after the midterm. On this HW, skip the verilog question, #4, since I failed to way a word about Verilog, in class.
LM317 data sheet (Fairchild) for use in HW D1
Art of Electronics (2d ed.) excerpt on heat sinking (for use with HW D1)

Oct. 14, 2014

Review session notes (handwritten) Tu., Oct 14

Oct. 10, 2014

Class12 notes (handwritten): MOSFETs, Th., Oct 9

Oct. 8, 2014

Class11 notes (handwritten): regulators, Tu., Oct 7

Oct. 3, 2014

Class10 notes (handwritten): PID loop, Th., Oct 2

Oct. 1, 2014

Class9 notes (handwritten): nasty oscillators, Tu., Sept 30

September 27, 2014

HW 4, due Mon., Oct. 6, 5 p.m.

September 26, 2014

Class8 notes (handwritten): oscillators, Th., Sept 25

September 24, 2014

Class7 notes (handwritten): op amps 2, Tu., Sept 23

September 22, 2014

HW 3, due Mon., Sept. 29, 5 p.m.

September 19, 2014

Class6 notes (handwritten): op amps 1, Th., Sept 18

September 17, 2014

Class5 notes (handwritten): transistors II, Tu., Sept 16
HW 2, due Mon., Sept. 22, 5 p.m.

September12, 2014

Class 4 notes (handwritten): transistors I, Th., Sept 11

September 9, 2014

Class 3 notes (handwritten): diode Circuits, Tu., Sept 9
HW 1, due Mon., Sept. 15, 5 p.m. Corrected 9/14/14

September 5, 2014

Class 2 notes (handwritten): RC Circuits, Th., Sept 4
tidy (typed) solution to anon quiz on loaded pot (volume control)

September 3, 2014

Class 1 notes (handwritten): DC Circuits, Tues., Sept 2

Fall INFORMATION: July 7, 2014

Course Information: intro and schedule Fall 2014
We will hold a normal class and lab on the very first day, Tues., Sept. 2: Please read class and lab notes for Day 1 before you come in.
The course meets in Science Center 206
You should have read through Lab 1, and the posted notes for Class 1.
1st-day Signup Form
Class 1 notes (typed): DC Circuits
Lab 1: DC Circuits
Lab 2: RC Circuits



Hints and Tips, illustrated An excellent introduction to lab setups, by Summer School and SEAS instructor David Abrams

Link to Text problem solutions, and old exams (some with solutions)


Click here to hop to old Finals, and Text-problem solutions


Files are in Acrobat (PDF) Format, Download Acrobat Reader

Most recent entries at top of page